Spin-orbit torque magnetic random-access memory (SOT-MRAM) offers high speed, ultrahigh endurance, and compatibility with advanced semiconductor processes, making it a promising candidate for next-generation nonvolatile memory. However, intrinsic bias fields in magnetic tunnel junctions (MTJs), originating from reference-layer stray fields and interlayer coupling, cause asymmetric critical switching currents and increased energy consumption. Existing compensation approaches usually introduce additional magnetic layers into the MTJ stack, which increases fabrication complexity and limits wafer-scale integration. Here, we propose a bias-compensation strategy without modifying the MTJ stack by engineering local stray magnetic fields through magnetic filling materials in vertical interconnect access (VIA) channels during the back-end-of-line process. Micromagnetic simulations show that the proposed magnetic filling layer can provide the required auxiliary field for deterministic switching and significantly suppress write-current asymmetry. By optimizing the MTJ position relative to the magnetic filling structure, the write-current bias ratio is reduced from 21.6% in the conventional design to 1.3%. The approach is also applicable to in-plane magnetic anisotropy SOT-MTJs, reducing the bias ratio from 19.8% to -0.2%. Scaling analysis further demonstrates that the compensation effect remains effective when the device size is reduced to 20% of the original dimension (MTJ diameter approximately 10 nm), indicating its potential for high-density SOT-MRAM integration.