ArXiv · 2026
On-device machine learning is increasingly important in applications where extreme data rates or resource constraints make centralized processing infeasible. Logic neural networks (LNNs), which directly learn Boolean logic instead of conventional arithmetic operations, have recently emerged as a state-of-the-art approach for efficient inference and are particularly well suited for deployment in custom silicon. However, hard-wired solutions are typically optimized for narrowly defined tasks and lack the ability to adapt to changing data distributions. Next-generation pixel detectors in particle physics present a particularly challenging use case: their high granularity and readout frequency generate data rates that cannot be centrally processed, while stringent space and power constraints necessitate highly efficient on-chip inference. Moreover, radiation damage progressively alters detector response, requiring models that can be re-trained and reconfigured after deployment. In this work, we evaluate LNNs for on-chip inference in pixel detectors. We show that their superior resource efficiency may enable a step change in model capability, making more complex architectures feasible within the available hardware budget. LNNs also provide increased robustness against radiation-induced random bit flips. Finally, we present novel work on reconfigurable LNNs, enabling models to adapt to changing operating conditions after deployment.
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